Fabrication of magnetoresistive random-access memory (MRAM) devices normally involves a sequence of processing steps during which many layers of metals and dielectrics are deposited and then patterned to form a magnetoresistive stack as well as electrodes for electrical connections. To define the magnetic tunnel junctions (MTJ) in each MRAM device, precise patterning steps including photolithography and reactive ion etching (RIE), ion beam etching (IBE) or their combination are usually involved. During RIE, high energy ions remove materials vertically in those areas not masked by photoresist, separating one MTJ cell from another.
However, the high energy ions can also react with the non-removed materials, oxygen, moisture and other chemicals laterally, causing sidewall damage and lowering device performance To solve this issue, pure physical etching techniques such as RIE or ion beam etching (IBE) using different gas plasmas such as Ar and Xe have been applied to etch the MTJ stack. However, due to the non-volatile nature, physically etched conductive materials in the MTJ and bottom electrode can form a continuous path across the tunnel barrier, resulting in shorted devices. Moreover during physical etch of MTJ, one layer can be re-deposited and intermixed with the surrounding layers, lowering the device performance. A new approach to overcome these drawbacks is thus needed for the future sub 60 nm MRAM products.
Several references teach multi-step etching methods to form MTJ's, including U.S. Pat. No. 9,793,126 (Dhindsa et al), U.S. Pat. No. 9,722,174 (Nagel et al), U.S. Pat. No. 8,883,520 (Satoh et al), and U.S. Pat. No. 9,269,893 (Lu et al). U.S. Pat. No. 9,570,670 (Park et al) and U.S. Pat. No. 8,642,358 (Lee) teach etching using spacers. All of these references are different from the present disclosure.